Senior ASIC DFT DV Engineer (Hybrid)
Cisco Systems
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San Jose, CA · Posted October 13, 2026
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About the job
We are looking for a Senior ASIC DFT DV Engineer to lead test planning and development for DFT architecture in AI-driven hardware platforms. You will architect scalable test infrastructures and collaborate with RTL and physical design teams. Ideal candidates have significant ASIC and DFT expertise, with experience in complex design and memory testing.