Principal Hardware Engineer

Mercury Systems is seeking the best and brightest engineering talent to help us deliver cutting‑edge technology for mission‑critical aerospace and defense applications, advancing innovation where it matters most.

In this role, our team is looking for a Principal Electrical Engineer who will architect and lead the development of ruggedized board‑level hardware for advanced embedded computing, high‑speed digital systems, advanced FPGA solutions, secure processing for extreme‑environment electronics across air, land, sea, and space. You will provide end‑to‑end technical leadership, shaping hardware architectures, driving engineering standards, and ensuring high‑reliability designs through collaborative reviews and proactive verification. Working within Mercury’s Integrator Mindset, you will partner across sites and disciplines to deliver board‑level solutions that directly support national security.

Job Responsibilities:

Lead board‑level design and development of complex digital circuits and modules from concept through production

Architect advanced electrical circuit board solutions incorporating secure processing, storage, networking, FPGA technologies, high‑speed interfaces, and electronics designed for extreme environments

Develop and analyze high‑speed digital board designs including 400G+ Ethernet, PCIe Gen5+, DDR5+, and next‑generation interconnect technologies

Establish engineering best practices, design guidelines, and quality‑focused processes that enable proactive verification and high‑reliability board development

Support proposal efforts by providing technical system architectures, cost and schedule estimates, and Basis of Estimate (BOE) contributions

Drive design‑for‑manufacturability (DFM), design‑for‑assembly (DFA), and design‑for‑test (DFT) initiatives and collaborate with manufacturing to address board build issues

Coordinate cross‑functional collaboration with systems, software, mechanical, and manufacturing engineering teams to ensure integrated, robust hardware solutions

Required Qualifications:

Bachelor’s degree in Electrical Engineering or Computer Engineering

Typically requires a minimum of 6+ years of electrical engineering experience in board-level hardware design from concept through production

Experience architecting and designing complex embedded digital hardware incorporating high‑speed interfaces (400G+ Ethernet, PCIe Gen5+, DDR5+), memory technologies, and advanced interconnects

Strong understanding of high‑speed digital signal integrity principles

Proficiency with board‑level schematic capture tools and collaboration with CAD/SI teams throughout the PCB design process

Experience mentoring engineers, supporting cross‑functional collaboration, and contributing to technical leadership within engineering teams

“This position requires you to access information that is subject to U.S. export regulations. You may only access such information if you are a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. government.”

Preferred Qualifications:

Experience with advanced CPU architectures such as Intel Xeon‑D, Cascade Lake, or Granite Rapids.

Experience designing FPGA board‑level solutions using AMD/Xilinx Versal or Intel/Altera Agilex.

Experience designing advanced network interface boards (Nvidia, Broadcom, Marvell)

Background with VPX/VITA standards (3U/6U), COM Express, or SoM architectures

Experience developing MIL‑STD‑based rugged electronics or secure/anti‑tamper/DRFM hardware

Exposure to space electronics or integration of radiation‑tolerant components

Proficiency with Cadence DEHDL/Concept schematic capture tools and Cadence Allegro or equivalent CAD/SI platforms

Experience with reliability or stress analysis techniques such as FMECA or derating

Familiarity with requirements and workflow tools such as DOORS, JAMA, JIRA, or Confluence

Experience mentoring engineers and leading technical teams

Experience supporting proposals, cost/schedule estimates, and BOE development