Principal Front-End Design Engineer
Synopsys
Sunnyvale, CA · Posted October 21, 2026
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Where Sunnyvale, CA ranks
Where Sunnyvale, CA placed in our monthly rankings, month by month. Each month stays online at its own address.
November 2026
- #1Best cities for consumer and retail pay after cost of living$194k · of 11
- #3Best cities for data and analytics pay after cost of living$213k · of 28
- #4Best cities for pay after cost of living in California$192k · of 32
- #4Best all-round cities for AI careers95 / 100 · of 100
- #4Best all-round cities for AI careers in the West Coast88 / 100 · of 39
- #5Best cities for pay after cost of living in the West Coast$192k · of 39
Rankings about engineering jobs
- Best cities for software and engineering jobs #1 San Francisco (3,412 openings)
- Best cities for engineering pay after cost of living #1 San Mateo ($216k)
- Most requested AI skills in engineering jobs #1 AI tools in daily work (6.1%)
- AI tools named most often in engineering jobs #1 Claude (1.7%)
- Employers with the most engineering jobs #1 Amazon (2,992 roles)
How AI is used in this kind of work
Among web developers, AI is already used for a large share of the tasks. Measured exposure for web developers: 48% (high).
Share of this job’s tasks that AI is already used for at work, from real usage. It is not a forecast of job loss, and a low number means no use seen yet. Source: Anthropic Economic Index.
Synopsys has filed one layoff notice in the last twelve months, covering 128 workers, most recently August 2026. These are public filings with state labor departments, and an open role can sit alongside them. See the filings
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About the job
We Are
Synopsys is a leader in silicon-to-systems engineering solutions, helping customers accelerate innovation in AI-driven products through industry-leading EDA, IP, and design solutions.
You Are
As a Principal Front-End Design Engineer, you will lead methodology, subsystem architecture, and AI-enabled design innovation across IP and SoC development. You will build scalable design solutions, improve engineering productivity, and drive best practices across global teams.
What You'll Be Doing
Develop and deploy AI-driven solutions for verification, synthesis, constraints, and DFT workflows.
Architect reusable subsystem reference designs for Synopsys IP.
Debug and optimize front-end design methodologies and automation flows.
Drive adoption of best practices across design and verification teams.
Collaborate with EDA, IP, and customer-facing engineers to solve complex design challenges.
Mentor engineers through technical leadership and knowledge sharing.
What You'll Need
BS/MS in Electrical Engineering, Computer Engineering, or related field.
10+ years of ASIC, SoC, or IP design and verification experience.
Expertise in verification, synthesis, timing constraints, DFT, CDC/RDC, or lint methodologies.
Strong experience with Synopsys tools such as VCS, VC SpyGlass, Fusion Compiler, Design Compiler, and TestMAX.
Proficient in SystemVerilog, UVM, Tcl, Python, or similar languages.
Demonstrated technical leadership and influence across cross-functional engineering teams.
What Sets You Apart
Deep understanding of IP reuse, subsystem integration, and SoC development.
Passion for applying AI to improve design productivity and quality.
Strong problem-solving, communication, and mentoring skills.
Ability to translate complex technical challenges into scalable, practical solutions.
The Team You'll Be Part Of
You will be a member of the Digital Methodology Interop Engineering team, a team of engineers dedicated to advancing IP and subsystem design excellence at Synopsys. The team collaborates across global sites, driving innovation in methodology, tool integration, and best practices. You will help shape the future of SoC design with Synopsys IP.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.