Lead, Electrical Engineer

Job Title: Lead, FPGA Firmware Verification Engineer

Job Code: 46971

Job Location: Alpharetta, GA

Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off

Job Description:

L3Harris is seeking a hands-on Lead, FPGA Firmware Verification Engineer to provide technical leadership and execute FPGA verification activities for mission-critical aerospace and defense products.

This role combines simulation development, regression execution, hardware integration and laboratory testing with leadership of verification efforts supporting DO-254 compliance. The successful candidate will develop and enhance verification environments, debug simulation and hardware issues, and align verification activities, documentation, and deliverables with program requirements and schedules.

The ideal candidate brings strong FPGA design and verification experience, knowledge of DO-254 processes, excellent analytical and laboratory skills, and the ability to communicate technical issues and solutions clearly. This individual will collaborate across engineering disciplines and geographically distributed teams within Advanced Mission Technologies to deliver high-quality products to our customers.

Essential Functions:

Provide hands-on technical leadership for FPGA verification, including verification planning, testbench development, simulation, regression testing, hardware testing, and results analysis.

Develop, maintain, and execute verification environments using VHDL, Verilog, SystemVerilog, Universal Verification Methodology (UVM), and assertion-based verification, as applicable.

Review requirements for clarity, completeness, and verifiability; develop requirements-based verification procedures and maintain traceability between requirements, tests, and results.

Support DO-254 verification activities, including preparation and review of verification plans, procedures, results, coverage analyses, and supporting lifecycle documentation.

Develop and enhance scalable simulation environments, automated regressions, and scripting infrastructure to improve verification efficiency and repeatability.

Analyze verification coverage, identify gaps, and drive resolution of discrepancies and outstanding verification objectives.

Guide and perform laboratory integration and hardware verification, including troubleshooting FPGA behavior and correlating hardware results with simulations.

Assist verification engineers in debugging testbenches, simulations, and hardware issues; provide technical mentoring and promote consistent verification practices.

Work with FPGA development and verification tools, including AMD/Xilinx Vivado and legacy ISE 14.7, Synplify, Intel/Altera Quartus, and Siemens QuestaSim, as applicable to assigned programs.

Coordinate with project engineering, program management, systems engineering, hardware engineering, software engineering, and certification stakeholders across multiple locations.

Align verification priorities, resources, documentation, and deliverables with program cost and schedule objectives; assess cost, schedule, and resource impacts; recommend mitigation strategies and identify decisions or approvals needed to support execution.

Provide timely technical status, identify execution risks and variances, and develop updated estimates to complete for newly identified in-scope work.

Use L3Harris-approved AI tools, where authorized, to support requirements analysis, verification development, debugging, and documentation, while independently validating outputs and protecting sensitive information.

Maintain configuration-controlled verification artifacts using applicable revision control, requirements management, and issue-tracking tools.

Learn and apply new tools, technologies, and verification methods as program needs evolve.

Qualifications:

Bachelor’s degree and a minimum of nine (9) years of prior relevant experience; graduate degree and a minimum of seven (7) years of prior related experience; or, in lieu of a degree, a minimum of thirteen (13) years of prior related experience.

Demonstrated experience in FPGA design and/or verification, including simulation development, debugging, and hardware verification.

Experience with SystemVerilog, VHDL, UVM, Assertions, constrained-random verification, functional coverage, code coverage, and linting.

Experience supporting DO-254 Design Assurance Level A programs and associated certification evidence and requirements-based verification.

Preferred Additional Skills:

Verification and Design Assurance

Experience supporting airworthiness certification activities involving MIL-HDBK-516C and applicable guidance, including AC 17-01.

Experience using C/C++ for FPGA or ASIC verification and reference-model development.

Experience with model-based systems engineering (MBSE) and Cameo

FPGA Architectures and Interfaces

Experience with AMD/Xilinx and/or Intel/Altera FPGA architectures, including Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, and Zynq UltraScale+ MPSoC devices.

Experience with high-speed serial interfaces and packet-based protocols, including PCI Express, Serial RapidIO, Ethernet, and Fibre Channel, plus 10 Gigabit Ethernet network interface designs and network protocols including IPv6 and UDP.

Experience with high-speed DDR memory interfaces.

Tools, Automation and Documentation

Proficiency with FPGA development and verification tools such as Vivado, Quartus, QuestaSim, Synplify, and/or legacy ISE 14.7, plus Linux environments and scripting languages such as Python, Perl, Bash, or C shell.

Experience with Git or Subversion for configuration management, Jira for issue tracking, and requirements management tools such as Jama or IBM DOORS.

Strong technical writing skills.