Senior/Principal Interface IP Verification Engineer (Pre-Silicon) - 18386
Synopsys
Austin, TX · Posted September 25, 2026
Just laid off? Start here: a plan for the first weeks
Want recruiters in Engineering to be able to find you?
Roles at this level, like this one at Synopsys, are often filled through recruiters.
See every open role at Synopsys
More in Texas job market · All Senior jobs (391) · Technology & Software · Engineering jobs
More roles at Synopsys
- Principal Analog Methodology Specialist - 19050 · Boxborough, MA
- Product Management, Principal · Sunnyvale, CA
- Principal Application Engineer - Verification
- Executive Director SOC Physical Design · Sunnyvale, CA
- ASIC Digital Design Engineer-Principal-18710 · Austin, TX
- Sales Account Management, Principal
Similar jobs
- Principal, Design Engineering · Celestica · Austin, TX
- Principal HVAC Engineer · Worley Group · Houston, TX
- Principal RF Engineer · OSI Systems · Richardson, TX
- Principal Technical Program Manager - Network Infrastructure · Oracle · San Antonio, TX
- Principal Site Reliability Engineer (Vehicle Engineering) · SpaceX · Bastrop, TX
- Principal Mechanical Engineering Lead · RTX · mckinney, TX
Where Austin, TX ranks
Where Austin, TX placed in our monthly rankings, month by month. Each month stays online at its own address.
November 2026
- #1Best cities for professional services pay after cost of living$168k · of 25
- #1Cities with the most jobs that do not need a four-year degree in the Southwest493 jobs · of 38
- #1Best cities for pay after cost of living in the Southwest$168k · of 15
- #1Best cities for pay after cost of living in Texas$168k · of 8
- #1Best cities for software and engineering jobs in the Southwest1,931 openings · of 33
- #1Best all-round cities for mid-career professionals in the Southwest92 / 100 · of 15
Rankings about engineering jobs
- Best cities for software and engineering jobs #1 San Francisco (3,412 openings)
- Best cities for engineering pay after cost of living #1 San Mateo ($216k)
- Most requested AI skills in engineering jobs #1 AI tools in daily work (6.1%)
- AI tools named most often in engineering jobs #1 Claude (1.7%)
- Employers with the most engineering jobs #1 Amazon (2,992 roles)
Pay compared with the market
This listing does not state pay. Across 166 open senior listings that state pay, the middle half runs $180,000 to $260,000 and the median is $225,000.
Listed pay is what employers advertise, not what people are paid.
Synopsys has filed one layoff notice in the last twelve months, covering 128 workers, most recently August 2026. These are public filings with state labor departments, and an open role can sit alongside them. See the filings
Skills this job asks for
Say which you have and which you want to build. We use it to match you to jobs like this one.
About the job
We Are
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, from AI infrastructure and cloud computing to autonomous systems and next-generation communications.
As the leader in chip design, verification, and silicon IP, Synopsys enables the world's top semiconductor companies to accelerate innovation and bring groundbreaking products to market faster. Join us and help shape the future of technology.
The Opportunity
We're looking for an experienced ASIC Verification Engineer who is passionate about solving complex protocol challenges and delivering world-class Interface IP solutions.
In this role, you'll work on industry-leading PCIe, CXL, DDR, and Ethernet technologies that serve as foundational building blocks for AI accelerators, data centers, networking platforms, and next-generation SoCs. You'll collaborate with architects, design engineers, and verification experts to ensure the quality, performance, and reliability of technology used by leading semiconductor companies worldwide.
What You'll Do
Own verification of complex Interface IP solutions, including PCIe, CXL, DDR, and Ethernet technologies.
Architect, develop, and enhance scalable UVM-based verification environments and reusable verification IP.
Define verification strategies and test plans from specification review through product release.
Develop constrained-random, coverage-driven verification solutions using SystemVerilog and UVM.
Drive functional coverage closure and verification signoff activities.
Debug challenging RTL, protocol, and system-level issues while improving verification efficiency and automation.
Partner closely with architecture, RTL, firmware, and systems teams to identify issues early and ensure robust product quality while also mentoring engineers contributing to verification methodology improvements across the organization.
Why This Role Matters
The Interface IP you help verify will be integrated into some of the world's most advanced semiconductor products. Your work will directly impact the performance, reliability, and success of technologies powering:
AI and machine learning platforms
Cloud and hyperscale data centers
High-performance computing systems
Networking and communication infrastructure
Automotive and intelligent edge applications
What You'll Bring
BSEE with at least 8 to 10+ years of direct industry experience with proven experience verifying complex ASIC or SoC designs.
Deep expertise with SystemVerilog and UVM methodologies.
Strong protocol knowledge in one or more of the following areas:
PCI Express (PCIe), Compute Express Link (CXL), DDR Memory Interfaces, Ethernet
Experience developing constrained-random and coverage-driven verification environments.
Strong debugging and problem-solving skills spanning RTL, verification, and protocol compliance.
Experience with industry-standard simulators such as VCS, ModelSim, or similar tools.
Ability to independently drive technical initiatives while collaborating across geographically distributed teams.
Preferred
Experience with verification IP development, assertion-based verification and formal methodologies with knowledge of modern SoC architectures and high-speed communication interfaces.
What Success Looks Like
Deliver robust, high-quality verification solutions for complex Interface IP products.
Improve verification coverage, reusability, and execution efficiency.
Influence verification methodologies and best practices across engineering teams.
Drive successful product releases with exceptional quality standards.
Help develop the next generation of verification talent through technical mentorship and leadership.
The Team
You'll join a team of highly skilled verification engineers responsible for developing and verifying industry-leading Interface IP solutions. Working alongside experts in architecture, design, and verification, you'll tackle some of the semiconductor industry's most challenging technical problems while contributing to products deployed worldwide.
Why Synopsys
At Synopsys, you'll work on technology at the heart of the semiconductor ecosystem. Our IP, EDA, and silicon solutions enable innovation across AI, automotive, cloud computing, mobile, and high-performance computing markets.
Here, you'll have the opportunity to:
Solve complex technical challenges.
Work alongside industry-recognized experts.
Influence products used across the global semiconductor industry.
Advance your technical leadership and career growth.
Contribute to technologies shaping the future of computing.
Rewards and Benefits
Synopsys offers a comprehensive package of health, wellness, financial, and professional development benefits designed to support you throughout your career.
#LI-SW1