Interconnect Performance Engineer

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The Role:

As a member of the Infinity Fabric Architecture and Performance team, you will help define and deliver the next generation of Fabric Interconnects, providing low latency, high efficiency connectivity to the memory system across AMD’s Data Center, Gaming, Client, and Semi-Custom product lines. The Infinity Fabric memory system is a foundational technology across AMD’s product portfolio, offering the opportunity to work on a broad range of market leading SoCs. This is a highly technical, fast paced role at the cutting edge of interconnect, memory system, and simulation driven performance validation. Come join the AMD team!

The Person:

We are seeking a Performance Engineer with deep expertise in hardware simulation and system level performance analysis/verification. The ideal candidate demonstrates strong technical leadership, clear communication skills, and the ability to independently drive complex performance investigations across globally distributed, multi-site teams.

Key Responsibilities:

Perform RTL performance analysis and verification for the Infinity Fabric Interconnect.

Provide technical leadership while collaborating closely with architecture, design, and modeling teams on high‑performance SoC memory system designs.

Execute performance verification plans at the IP level and support SoC‑level performance debug using both simulation and emulation environments.

Conduct theoretical analysis of memory system optimizations; develop, run, and analyze benchmarks in simulation and/or emulation environments.

Debug performance failures, identify design bottlenecks, and propose data‑driven architectural or RTL solutions.

Develop and enhance debug infrastructure, tooling, and visualization solutions to accelerate performance analysis and root‑cause identification.

Leverage AI‑based tools and automation to improve engineering productivity and performance analysis workflows.

Preferred Experience:

Proven experience in RTL performance analysis and debug using hardware simulation/emulation platforms

Hands‑on experience with simulation testbench bring‑up, configuration, and development of new performance test cases.

Strong system‑level performance debug experience across complex IP interactions, including CPU, GPU, and I/O workloads.

Deep understanding of memory system architecture and interconnect design.

Excellent knowledge of Verilog and SystemVerilog.

Working knowledge of C, C++, and a scripting language such as Python or Perl.

Solid understanding of multiprocessor coherency, memory ordering, I/O ordering, interrupts, MMU, and cache architectures.

Strong debugging, data analysis, and technical presentation skills.

Academic Credentials:

BS, MS, or PhD degree in Electrical or Computer Engineering. Advance degree preferred.

Location:

Austin, TX

This role is not eligible for visa sponsorship.

#LI-MR1

Benefits offered are described: AMD benefits at a glance .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

The Role:

As a member of the Infinity Fabric Architecture and Performance team, you will help define and deliver the next generation of Fabric Interconnects, providing low latency, high efficiency connectivity to the memory system across AMD’s Data Center, Gaming, Client, and Semi-Custom product lines. The Infinity Fabric memory system is a foundational technology across AMD’s product portfolio, offering the opportunity to work on a broad range of market leading SoCs. This is a highly technical, fast paced role at the cutting edge of interconnect, memory system, and simulation driven performance validation. Come join the AMD team!

The Person:

We are seeking a Performance Engineer with deep expertise in hardware simulation and system level performance analysis/verification. The ideal candidate demonstrates strong technical leadership, clear communication skills, and the ability to independently drive complex performance investigations across globally distributed, multi-site teams.

Key Responsibilities:

Perform RTL performance analysis and verification for the Infinity Fabric Interconnect.

Provide technical leadership while collaborating closely with architecture, design, and modeling teams on high‑performance SoC memory system designs.

Execute performance verification plans at the IP level and support SoC‑level performance debug using both simulation and emulation environments.

Conduct theoretical analysis of memory system optimizations; develop, run, and analyze benchmarks in simulation and/or emulation environments.

Debug performance failures, identify design bottlenecks, and propose data‑driven architectural or RTL solutions.

Develop and enhance debug infrastructure, tooling, and visualization solutions to accelerate performance analysis and root‑cause identification.

Leverage AI‑based tools and automation to improve engineering productivity and performance analysis workflows.

Preferred Experience:

Proven experience in RTL performance analysis and debug using hardware simulation/emulation platforms

Hands‑on experience with simulation testbench bring‑up, configuration, and development of new performance test cases.

Strong system‑level performance debug experience across complex IP interactions, including CPU, GPU, and I/O workloads.

Deep understanding of memory system architecture and interconnect design.

Excellent knowledge of Verilog and SystemVerilog.

Working knowledge of C, C++, and a scripting language such as Python or Perl.

Solid understanding of multiprocessor coherency, memory ordering, I/O ordering, interrupts, MMU, and cache architectures.

Strong debugging, data analysis, and technical presentation skills.

Academic Credentials:

BS, MS, or PhD degree in Electrical or Computer Engineering. Advance degree preferred.

Location:

Austin, TX

This role is not eligible for visa sponsorship.

#LI-MR1

Benefits offered are described: AMD benefits at a glance .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.