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About the job

We Are:

Synopsys is the leader in engineering solutions from silicon to systems, powering the era of pervasive intelligence. Our technologies help drive innovation across chip design, verification, and IP integration, enabling breakthroughs from AI systems to autonomous vehicles. Join us to help accelerate the next generation of technology.

You Are:

You are a motivated Application Engineering professional with a solid foundation in ASIC SOC design and familiarity with high-speed protocols such as PCIe, SerDes and DDR. You bring hands-on experience in simulation, synthesis, and static timing analysis, along with strong analytical and problem-solving skills. You are excited to support customers as they integrate leading Interface IP into complex SoC designs.

What You’ll Be Doing:

Supporting Interface IP customers with integration across the SoC design flow

Assisting with technical issue resolution and integration reviews

Helping with silicon and system bring-up, including debugging critical issues

Collaborating with internal teams to deliver solutions aligned to customer requirements

Staying current with industry standards, protocol developments, and application trends

Traveling occasionally to support customer engagements

The Impact You Will Have:

Supporting successful adoption and integration of Synopsys Interface IP products

Helping customers move development forward through effective technical support

Contributing to customer success by helping resolve integration issues efficiently

Building experience with advanced IP and high-speed interface technologies

Contributing to Synopsys’ reputation as a trusted customer partner

What You’ll Need:

Bachelor’s or Master’s degree in Electrical Engineering or a related field, with a focus on ASIC SOC design

5+ years of experience in design, verification, or application engineering

Proficiency in RTL coding with Verilog and/or System Verilog

Experience with high-speed protocols such as PCIe, Ethernet and DDR

Hands-on experience with simulation, synthesis, and static timing analysis (STA)

Familiarity with UNIX environments and ASIC/SoC tape-out flows

Knowledge of CDC, RDC, lint, and DFT is a plus

Who You Are:

Curious, results-oriented, and able to manage multiple priorities

Strong in verbal and written communication in English

Effective at collaborating across teams

Analytical, thoughtful, and strong at solving technical problems

Willing to travel occasionally as needed

The Team You’ll Be A Part Of:

This team helps customers integrate Interface IP into SoC designs, navigate design flows, debug critical issues, and support silicon bring-up. Working closely with customers and internal partners, the team contributes to successful deployment across a range of market segments.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits. Details will be provided during the hiring process.

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